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2.5V/3.3V TWO INPUT , 1GHz Precision EdgeTM LVTTL/CMOS-TO-LVPECL SY89834U 1:4 FANOUT BUFFER/TRANSLATOR
FEATURES
s Guaranteed AC performance over temperature and voltage: * > 1.0GHz fMAX * < 20ps within-device skew * < 225ps rise/fall times s Low jitter design: * Cycle-to-cycle: < 1ps (rms) * Total jitter: < 10ps (pk-pk) s Low voltage 2.5V and 3.3V supply operation s Four differential 100k LVPECL outputs s Wide operating temperature range: -40C to +85C s Includes a 2:1 MUX select input s Accepts single-ended TTL/CMOS inputs and provides four LVPECL outputs s Available in 16-pin (3mm x 3mm) MLFTM package Precision EdgeTM
DESCRIPTION
The SY89834U is a high-speed, 2GHz LVTTL/CMOS-toLVPECL fanout buffer/translator optimized for high-speed ultra-low skew applications. The input stage is designed to accept two single-ended LVTTL/CMOS compatible signals that feed into a 2:1 MUX. The selected input is translated and distributed as four differential 100K compatible LVPECL outputs. Within device skew is guaranteed to be less than 20ps over supply voltage and temperature. The single-ended input buffers accept TTL/CMOS logic levels. The internal threshold of the buffers is defined as VCC/2. The SY89834U is a part of Micrel's high-speed Precision EdgeTM family. For applications that require a different I/O combination, consult Micrel's website at www.micrel.com, and choose from a comprehensive product line of highspeed, low-skew fanout buffers, translators and clock generators.
APPLICATIONS
s s s s s Processor clock distribution/translation SONET clock distribution/translation Fibre Channel clock distribution/translation Gigabit Ethernet clock distribution/translation Single-ended ASIC-to-differential communication IC signal translation
FUNCTIONAL BLOCK DIAGRAM
Q0 /Q0 SEL
Q1 IN1 (LVTTL/CMOS) /Q1 1 MUX IN2 (LVTTL/CMOS) 0 Q2 /Q2 D Q
EN Q3 /Q3 2 Single-Ended Clock/Data Inputs
4 Differential LVPECL Outputs
Precision Edge is a trademark of Micrel, Inc. MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc.
Rev.: C Amendment: /0
1
Issue Date: February 2003
Micrel
PRELIMINARY Precision EdgeTM SY89834U
PACKAGE/ORDERING INFORMATION
/Q0 Q0 VCC GND
Ordering Information
Part Number Package Type MLF-16 MLF-16 Operating Range Industrial Industrial Package Marking 834U 834U
16 15 14 13 Q1 /Q1 Q2 /Q2 1 2 3 4 5678
Q3 /Q3 VCC EN
12 11 10 9
IN1 SEL NC IN2
SY89834UMI SY89834UMITR*
*Tape and Reel
16-Pin MLFTM
PIN DESCRIPTION
Pin Number 15, 16 1, 2, 3, 4, 5, 6 8 Pin Name (Q0, /Q0) to (Q3, /Q3) EN Pin Function LVPECL Differential (Outputs): Terminate to VCC-2V. See "Termination Recommendations" section. Unused outputs may be left floating without impacting jitter and skew. TTL/CMOS Compatible Synchronous Enable: When EN goes LOW, Q outputs will go LOW and /Q outputs will go HIGH on the next LOW transition at IN inputs. Input threshold is VCC/2V. Includes a 25k pull-up resistor. Default state is HIGH when left floating. The internal latch is clocked on the falling edge of the input signal (IN1, IN2). TTL/CMOS Compatible Data/Clock (Inputs): IN1 and IN2 include a 25k pull-up resistor. The default state is HIGH when left floating. No Connect. Not internally connected. TTL/CMOS Compatible Select Input for signals IN1 and IN2. The input threshold is VCC/2V. HIGH at the SEL input selects signal IN1. LOW at the SEL input selects signal IN2. SEL includes a 25k pull-up resistor. The default state is HIGH when left floating. Ground. Exposed pad internally connected to GND and must be connected to a ground plane for proper termination. Positive Power Supply: Connect VCC pins together on the PCB to maintain the same potential. Bypass with 0.1F//0.01F low ESR capacitors.
9, 12 10 11
IN2, IN1 NC SEL
13, Exposed Pad 7, 14
GND VCC
TRUTH TABLE
IN1 0 1 X X X
Note 1.
IN2 X X 0 1 X
EN 1 1 1 1 0
SEL 1 1 0 0 X
Q0-Q3 0 1 0 1 0(1)
/Q0-Q3 1 0 1 0 0(1)
On next negative transition of the input signal (IN).
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Micrel
PRELIMINARY Precision EdgeTM SY89834U
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) .................................. -0.5V to +4.0V Input Voltage (VIN) ............................... -0.5V to VCC +0.3V ECL Output Current (IOUT) Continuous ............................................................. 50mA Surge .................................................................... 100mA Input Current (IN1, IN2) ............................................ 50mA Lead Temperature (Soldering, 10sec.), ................... 220C Storage Temperature (TS) ....................... -65C to +150C
Note 1.
Operating Ratings(Note 2)
Supply Voltage Range .......................... +2.375V to +3.63V Ambient Temperature (TA) ......................... -40C to +85C Package Thermal Resistance MLFTM (JA) Still-Air ............................................................. 60C/W 500lfpm ............................................................ 54C/W MLFTM (JB) Junction-to-Board, Note 3 .............. 32C/W
Note 2. Note 3.
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to ABSOLUTE MAXIMUM RATlNG conditions for extended periods may affect device reliability. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. Junction-to-board resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB.
DC ELECTRICAL CHARACTERISTICS(Notes 1, 2)
TA = -40C to +85C Symbol VCC ICC VIN VDIFF_IN
Note 1. Note 2.
Parameter Power Supply Voltage Range Power Supply Current Input Voltage Swing Input Differential Swing
Condition
Min 2.375
Typ
Max 3.63
Units V mA
No load, maximum supply voltage see Figures 2a-2b. see Figures 2a-2b. 0.1 0.2
50
75
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and airflow greater than 500lfpm is maintained. Specification for packaged product only.
LVTTL/CMOS INPUTS DC ELECTRICAL CHARACTERISTICS(Notes 1, 2)
VCC = 2.5V 5% or VCC = 3.3V 10% , TA = -40C to +85C Symbol VIH VIL IIH IIL
Note 1. Note 2.
Parameter Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current
Condition
Min 2.0 0 -125
Typ
Max VCC 0.8 20 -300
Units V V A A
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. Specification for packaged product only.
(100KEP) LVPECL OUTPUTS DC ELECTRICAL CHARACTERISTICS(Notes 1, 2)
VCC = 2.5V 5% or VCC = 3.3V 10% , TA = -40C to +85C Symbol VOH VOL VOUT VDIFF_OUT
Note 1. Note 2.
Parameter Output HIGH Voltage Output LOW Voltage Output Voltage Swing Differential Output Voltage Swing
Condition RL = 50 to VCC-2V RL = 50 to VCC-2V see Figures 2a-2b. see Figures 2a-2b.
Min
Typ
Max
Units V V mV mV
VCC-1.145 VCC-1.020 VCC-0.895 VCC-1.945 VCC-1.820 VCC-1.695 550 1100 800 1600 1050 2100
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. Specification for packaged product only.
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Micrel
PRELIMINARY Precision EdgeTM SY89834U
AC ELECTRICAL CHARACTERISTICS(Notes 1, 2)
VCC = 2.5V 5% or 3.3V 10%, TA = -40C to +85C Symbol fMAX tPLH tPHL tSW tSKEW tJITTER DC tS tH t r, t f
Note 1. Note 2. Note 3. Note 4. Note 5. Note 6. Note 7. Note 8. Note 9.
Parameter Maximum Frequency Propagation Delay (IN1, IN2-to-Q) Switchover Time (SEL-to-Q) Within-Device Skew Part-to-Part Skew Cycle-to-Cycle Jitter Total Jitter Duty Cycle Set-Up Time (EN to IN1, IN2) Hold Time (EN to IN1, IN2) Output Rise/Fall Times (20% to 80%)
Condition Input tr / tf 350ps, Note 2 Note 4
Min 1.0 200 200
Typ
Max
Units GHz
320 320 5
500 500 20 300
ps ps ps ps ps(rms) ps(pk-pk) % ps ps
Note 5
Note 6 Note 7 Input tr/tf 350ps, Note 8 Note 9 and Note 10 Note 9 and Note 10 45 300 500 70 140 50
1 1 55
225
ps
Measured with a 2.0V input signal, 50% duty cycle, all PECL loading with 50 to VCC-2V. Output swing is 400mV. Specification for packaged product only. fMAX is defined as the maximum input frequency while enduring a valid output. fMAX is limited by the input stage. VIH = 2.0V, VIL = 0.8V, 50% duty cycle. Delay measured at 100MHz from the crossing of the input signal with VCC/2 as the crossing of the differential output signal. See Figure 1. Skew is measured between outputs under identical transitions. Cycle-to-cycle jitter definition: The variation period between adjacent cycles over a random sample of adjacent cycle pairs. TJITTER_CC = Tn - Tn+1, where T is the time between rising edges of the output signal. Total jitter definition: with an ideal clock input frequency of fMAX (device), no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. If tr/tf is less than 350ps, the duty cycle distortion will increase beyond the duty cycle limits. Set-up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications set-up and hold times do not apply.
Note 10. See "Timing Diagrams," Figure 1a.
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Micrel
PRELIMINARY Precision EdgeTM SY89834U
TIMING DIAGRAMS
EN VCC/2 tS VIN IN VCC/2 tPLH VCC/2 VCC/2 VCC/2 tPHL VOUT Swing tH VCC/2
/Q Q
Figure 1a. Timing Diagram (EN, IN1, IN2)
IN2 IN1
HIGH LOW
SEL VCC/2 /Q Q tSWITCHOVER VCC/2 tSWITCHOVER VOUT
Figure 1b. Timing Diagram (SEL)
DEFINITION OF SINGLE-ENDED AND DIFFERENTIAL SWING
VIN, VOUT
VDIFF_IN , V DIFF_OUT
Figure 2a. Single-Ended Swing
Figure 2b. Differential Swing
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Micrel
PRELIMINARY Precision EdgeTM SY89834U
TYPICAL OPERATING CHARACTERISTICS
VCC = 3.3V, TA = 25C, VIN = 2.0V, unless otherwise stated.
800 OUTPUT SWING (mV) 700 600 500 400 300 200 100 0 0
Output Swing vs. Frequency
PROPAGATION DELAY (ps)
400 380 360 340 320 300 280 260 240
Propagation Delay vs. Temperature
t
10 9 8 7 tSKEW (ps) 6 5 4 3 2
SKEW
vs. Temperature
0.5 1 1.5 2 2.5 FREQUENCY (GHz)
3
220 200 -50 -30 -10 10 30 50 70 TEMPERATURE (C)
90
1 0 -60 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
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Micrel
PRELIMINARY Precision EdgeTM SY89834U
FUNCTIONAL CHARACTERISTICS
VCC = 3.3V, VEE = 0V, VIN = 800mV, TA = 25C, unless otherwise stated.
155MHz Output 622MHz Output
275mV Offset (150mV/div.)
TIME (1ns/div.)
300mV Offset (150mV/div.)
TIME (321.9ps/div.)
1GHz Output
300mV Offset (150mV/div.)
TIME (200ps/div.)
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Micrel
PRELIMINARY Precision EdgeTM SY89834U
DIFFERENTIAL INPUT
VCC
25k IN1 IN2 SEL EN
R
R
GND
Figure 3. Simplified TTL/CMOS Input Buffer
RELATED PRODUCTS AND SUPPORT DOCUMENTATION
Part Number SY89830U SY89831U SY89832U SY89833U Function 2.5V/3.3V/5V 2.5GHz 1:4 PECL/ECL Clock Driver with 2:1 Differential Input Mux 2GHz Ultra Low-Jitter and Skew 1:4 LVPECL Fanout Buffer/Translator w/ Internal Termination 2GHz Ultra Low-Jitter and Skew 1:4 LVPECL Fanout Buffer/Translator w/ Internal Termination 2GHz Any Differential INPUT-to-LVDS Out 1:4 Fanout Buffer Translator w/ Internal Termination 16-MLFTM Manufacturing Guidelines Exposed Pad Application Note HBW Solutions New Products + Termination App Note Data Sheet Link http://www.micrel.com/product-info/products/sy89830u.shtml http://www.micrel.com/product-info/products/sy89831u.shtml http://www.micrel.com/product-info/products/sy89832u.shtml http://www.micrel.com/product-info/products/sy89833u.shtml http://www.amkor.com/products/notes-papers/ MLF-appnote-0301.pdf http://www.micrel.com/product-info/as/solutions.shtml
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Micrel
PRELIMINARY Precision EdgeTM SY89834U
TERMINATION RECOMMENDATIONS
+3.3V
+3.3V
ZO = 50 ZO = 50
R1 130
R1 130
+3.3V
R2 82
R2 82
Vt = VCC --2V
Figure 4a. Parallel Termination-Thevenin Equivalent Note 1. For +2.5V systems: R1 = 250, R2 = 62.5 For +3.3V systems: R1 = 130, R2 = 82
+3.3V
Z = 50 Z = 50 50 50
+3.3V
source 50 Rb
destination C1 0.01F (optional)
Figure 4b. Three-Resistor "Y-Termination" Note 1. Note 2. Note 3. Power-saving alternative to Thevenin termination. Place termination resistors as close to destination inputs as possible. Rb resistor sets the DC bias voltage, equal to Vt. For +3.3V systems Rb = 50. For +2.5V systems Rb = 39.
+3.3V R1 130 ZO = 50 /Q Vt = VCC --2V R2 82
+3.3V R1 130 V = VCC --1.3V R3 t +3.3V 1k
+3.3V
Q
R4 1.6k R2 82
Figure 4c. Terminating Unused LVPECL I/O Note 1. Note 2. Note 3. Unused output (/Q) must be terminated to balance the output. For +2.5V systems: R1 = 250, R2 = 62.5, R3 = 1.25k, R4 = 1.2k. Unused output pairs (Q and /Q) may be left floating.
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Micrel
PRELIMINARY Precision EdgeTM SY89834U
16 LEAD EPAD MicroLeadFrameTM (MLF-16)
0.42 +0.18 -0.18 0.23 +0.07 -0.05 0.01 +0.04 -0.01 0.65 +0.15 -0.65 0.20 REF. 0.42
+0.18 -0.18
0.85 +0.15 -0.65 3.00BSC 2.75BSC
16 1
1.60 +0.10 -0.10 PIN 1 ID
N 1
0.50 DIA
2 3 4
2.75BSC 3.00BSC
2 3 4
1.60 +0.10 -0.10
12 max SEATING PLANE TOP VIEW CC C L 4 0.23 +0.07 -0.05 0.01 +0.04 -0.01 1. 2. 3. 4.
0.42 +0.18 -0.18
0.5 BSC 1.5 REF BOTTOM VIEW
0.40 +0.05 -0.05
0.5BSC FOR EVEN TERMINAL/SIDE
SECTION "C-C" SCALE: NONE
DIMENSIONS ARE IN mm. DIE THICKNESS ALLOWABLE IS 0.305mm MAX. PACKAGE WARPAGE MAX 0.05mm. THIS DIMENSION APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.20mm AND 0.25mm FROM TIP. 5. APPLIES ONLY FOR TERMINALS
Rev. 02
Package EP- Exposed Pad
Die
CompSide Island
Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane
PCB Thermal Consideration for 16-Pin MLFTM Package (Always solder, or equivalent, the exposed pad to the PCB.) Package Notes: Note 1. Note 2. Package meets Level 2 moisture sensitivity classification, and are shipped in dry-pack form. Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC.
TEL
1849 FORTUNE DRIVE SAN JOSE, CA 95131
FAX
USA
+ 1 (408) 944-0800
+ 1 (408) 944-0970
WEB
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2003 Micrel, Incorporated.
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